1. Field of the Invention
The present invention relates to a solid-state image pickup device, such as a complementary metal oxide semiconductor (CMOS) image sensor or a charge coupled device (CCD) image sensor, including a photoelectric conversion portion having a plurality of pixels disposed therein. In particularly, the present invention relates to a back surface radiation type solid-state image pickup device in which a signal circuit is formed on one surface of a substrate, and a light is received through the other surface of the substrate, and a method of manufacturing the same. In addition, the invention relates to an electronic apparatus using the same.
2. Description of the Related Art
In recent years, a video camera and a mobile phone with a camera have been in wide spread use. A CCD type or CMOS type solid-state image pickup device is used in these cameras.
With regard to such a solid-state image pickup device, in recent years, a back surface radiation type solid-state image pickup device has been known which is structured in such a way that a wiring layer is formed on a front surface side of a semiconductor layer, and a light is made incident from a back surface side of the semiconductor layer to be adapted to capture an image of a subject. This technique has such a merit that a quantity of received light can be increased without receiving an influence of attenuation, kicking or the like of a light because there is no signal wiring made of Cu or the like on a light receiving surface side. Also, this technique also has such a merit that it is possible to prevent a part of the kicked light from being made incident to an adjacent pixel to provide color mixture. With regard to the back surface radiation type solid-state image pickup device, CCD type one and CMOS type one are proposed. This, for example, is described in Japanese Patent Laid-Open Nos 2002-151673 and 2003-31785.
The back surface radiation type MOS solid-state image pickup device (CMOS image sensor) is composed of a pixel area including a pixel array, and a peripheral area. In this case, the pixel array is structured by two-dimensionally disposing a plurality of pixels in one semiconductor chip. Also, the peripheral area is disposed outside the pixel area so as to include active elements and passive elements. In addition, the MOS type solid-state image pickup device includes various kinds of transistors such as a transferring transistor and an amplifying transistor every unit pixel composing the pixel array. In the MOS type solid-state image pickup device, a light which is made incident from the back surface side to each of the pixels is subjected to photoelectric conversion by a photodiode to generate signal electric charges, and these signal electric charges are transferred to a floating capacitance layer (floating diffusion) by the transferring transistor. Also, the signal electric charges thus transferred are converted into an electric signal by the floating diffusion and are then amplified by the amplifying transistor, thereby outputting signals from the respective pixels to a peripheral circuit portion.
FIG. 17 shows a layout diagram of a unit pixel cell (hereinafter referred to as “a unit pixel”) 100 in the pixel area composing an existing CMOS image sensor. The unit pixel 100 is composed of a photodiode PD serving as a photoelectric conversion element, a transferring transistor Tra, a resetting transistor Trb, an amplifying transistor Trc, a floating diffusion FD, and a well electrode 103 through which a voltage is applied to a pixel well. Also, in the existing solid-state image pickup device, the unit pixels 100 are two-dimensionally disposed within the pixel well, thereby structuring the pixel array. In addition, each adjacent two unit pixels 100 are electrically separated from each other through PN junction isolation by an isolation region 104.
Cross sectional views of this unit pixel 100 are respectively shown in FIGS. 18A and 18B. FIG. 18A is a cross sectional view taken on line A-A of FIG. 17, and FIG. 18B is a cross sectional view taken on line B-B of FIG. 17. The unit pixel 100 is disposed in a pixel well region composed of a p-type impurity region 116. In this case, a conductivity type of a predetermined region, within a semiconductor substrate 115 made of n-type silicon extending from a front surface side to a back surface side is converted from the n-type into the p-type, thereby forming the p-type pixel well region 116. The photodiode PD is composed of an n-type semiconductor region 112 formed in the p-type pixel well region 116, and a p-type semiconductor region 113 formed on the n-type semiconductor region 112. The transferring transistor Tra is composed of the n-type semiconductor region 112 of the photodiode PD, and an n+-type floating diffusion FD serving as an impurity region having an impurity concentration higher than that of the n-type semiconductor region 112, and a transfer gate electrode 107 formed on the semiconductor substrate 115 through a gate insulating film 114. In addition, the transfer gate electrode 107 is made of n+-type polysilicon.
In addition, as shown in FIG. 18B, the resetting transistor Trb is composed of a source/drain region 105 composed of an n+-type region within the pixel well region 116, and a gate electrode 108 made of n+-type polysilicon and formed on the semiconductor substrate 115 through the gate insulating film 114. At this time, the source region of the resetting transistor Trb, and the floating diffusion FD are made the same region.
The amplifying transistor Trc is composed of a source/drain region 105, 106 composed of an n+-type region within the p-type pixel well region 116, and a gate electrode 109 made of n+-type polysilicon and formed on the semiconductor substrate 115 through the gate insulating film 114 similarly to the case of the resetting transistor Trb.
In addition, a sidewall 110, for example, made from a silicon oxide film is formed on each of sidewalls of the transfer gate electrodes 107, 108 and 109. Also, an offset region 111 composed of an n+-type region is formed right below each of the sidewalls 110 of the amplifying transistor Trc and the resetting transistor Trb.
In addition, the isolation region 104 for isolating each adjacent two unit pixels 100 is composed of an isolation region layer 104a composed of a p-type semiconductor region, and a p-type channel stopper layer 104b formed on a surface side of the isolation region layer 104a. 
Also, a well electrode 103 composed of a p+-type region is formed in a desired region on the surface side of the semiconductor substrate 115.
FIG. 19 shows a schematic cross sectional structure of the existing back surface radiation type solid-state image pickup device composed of the unit pixels 100 each having the structure described above. In FIG. 19, the unit pixel 100 shown in FIG. 17 is illustrated as the pixel 100, and illustrations of the structures of the pixel transistor and the like are omitted here. That is to say, the pixel 100 is provided with the photodiode PD, the pixel transistors (the transferring transistor Tra, the resetting transistor Trb and the amplifying transistor Trc), the floating diffusion FD, and the well electrode 103 which have been all described.
Metallic wirings 122 of three layers are formed within an interlayer insulating film 121 made of a silicon oxide and formed on one surface side (on a front surface side of the semiconductor substrate 115) of the semiconductor substrate 115 having the pixel area formed thereon. A light blocking film 125, made of a metal, for light-blocking between each adjacent two pixels 100 is formed within an interlayer insulating film 124 made of a silicon oxide, and is formed on the other surface side (on the back surface side of the semiconductor substrate 115) of the semiconductor substrate 115 to which a light is made incident. In the light blocking film 125, each of positions corresponding to the photodiodes PD within the pixels 100, respectively, is opened. In addition thereto, a color filter 126 and on-chip lenses 127 are formed on the surface of the interlayer insulating film 124 in order.
Also, in such a back surface radiation type solid-state image pickup device, the metallic wiring 122 formed on the front surface side of the semiconductor substrate 115 is connected to the well electrode 103 formed on the semiconductor substrate 115 through a well contact, and a reference potential such as GND is supplied to the metallic wiring 122. As a result, a potential of the pixel well region 116 composed of the p-type semiconductor region is fixed to a given level.
Japanese Patent Laid-Open No. Sho 62-206873 discloses a structure on which the p+-type well electrode 103 for fixing the well potential of the pixel area to the reference potential such as GND is formed every unit pixel 100 as described with reference to FIGS. 18A and 18B. However, when the well electrode 103 for fixing the potential of the well region 116 is disposed every unit pixel 100, an area necessary for the disposition of the well electrode 103 is required every unit pixel 100. As a result, an area of the photodiode, and gate areas of the pixel transistors such as the amplifying transistor Trc need to be reduced all the more. In this case, there is encountered such a problem that the reduction in area of the photodiode PD causes reduction of a saturated signal level of the photodiode PD, and the reduction in gate areas of the pixel transistors increases a random noise such as a flicker noise generated from the pixel transistors.
For this reason, for example, as shown in FIG. 20, there is also expected a structure in which well contacts 118 are formed only in a peripheral portion of a pixel area 119. However, with the structure shown in FIG. 20, for the pixel 100 close to the well contact 118 as shown in an area I, and the pixel 100 located away from the well contact 118 as shown in an area II, it is difficult to hold the potential of the pixel well area 116 constant. As a result, there are caused such a problem that threshold values of the pixel transistors fluctuate among the pixels, and such a problem that a coupling capacitance between the isolation region 104 and the metallic wirings 122 fluctuates in the pixel area 119. As a result, the pixel characteristics are deteriorated.
It is noted that although in the above related art, the description has been given by exemplifying the solid-state image pickup device in which the MOS type p-type pixel well region is formed within the n-type semiconductor substrate, and the unit pixels are formed within the p-type pixel well region, the same problem as that described above is caused even in the case of a MOS type solid-state image pickup device in which the conductivity type of the impurity is opposite to that of the impurity in the related art.
In addition thereto, the problem in the above related art has been described by exemplifying the MOS type solid-state image pickup device. In this case, however, the CCD type solid-state image pickup device also involves the same problem that the well electrode is provided within the unit pixel, whereby it may be impossible to increase the area of the photodiode.